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PE94302
Product Description
The PE94302 is a high linearity, 6-bit UltraCMOSTM RF Digital Step Attenuator (DSA) specifically optimized for rad-hard space applications. This 50-ohm RF DSA covers a 31.5 dB attenuation range in 0.5 dB steps. It provides both parallel and serial CMOS control interface which operate on a single 3-volt supply. It also has a unique control interface that allows the user to select an initial attenuation state at power-up. The PE 94302 maintains high attenuation accuracy over frequency and temperature and exhibits very low insertion loss and power consumption. The PE94302 is manufactured in Peregrine's patented Ultra Thin Silicon (UTSi(R)) CMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Schematic Diagram
Switched Attenuator Array RF Input RF Output
50 RF Digital Step Attenuator For Rad-Hard Space Applications 6-bit, 31.5 dB, DC - 4.0 GHz Features * Attenuation: 0.5 dB steps to 31.5 dB
* Flexible parallel and serial programming
interfaces
* Unique power-up state selection * Positive CMOS control logic * High attenuation accuracy and linearity
over temperature and frequency
* Very low power consumption * Single-supply operation * 50 impedance
Figure 2. Package Type
28-lead CQFP
Parallel Control Serial Control Power-Up Control
6
3
Control Logic Interface
2
Table 1. Electrical Specifications @ +25C, VDD = 3.0 V
Parameter
Operation Frequency Insertion Loss Any Bit or Bit Combination Attenuation Accuracy 0.5 dB - 23.5 dB Attenuation 24 dB - 31.5 dB Attenuation 1 dB Compression1,2 Input IP31 Return Loss RF Input Power (50 ) 50% control to 0.5 dB of final Switching Speed value Notes: 1. Device Linearity will begin to degrade below 1 MHz 2. Maximum Operating Power = +12 dBm 3. Specs are guaranteed to 2.2 GHz, Characterized to 4.0 GHz Document No. 70/0186-01 www.psemi.com 1 Two-tone inputs
3
Test Conditions
Frequency
DC-4000 DC - 2.2 GHz DC 1.0 GHz 1.0 GHz 2.2 GHz 1.0 GHz 2.2 GHz 1 MHz - 2.2 GHz 1 MHz - 2.2 GHz DC - 2.2 GHz
Typical
Max
Units
MHz dB
1.5 +/-(0.25 + 3% of attenuation setting) +/-(0.25 + 5% of attenuation setting) +/-(11% of attenuation setting) 34 52 20 12
dB
dBm dBm dB dBm s
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 5
PE94302
Advance Information
Figure 3. Pin Configuration (Top View)
26 GND 25 GND 28 C0.5 24 GND 27 C1 23 C2 22 C4
Table 3. Absolute Maximum Ratings
Symbol
VDD VI
Parameter/Conditions
Power supply voltage Voltage on any input Storage temperature range Input power (50) ESD voltage (Human Body
Min
-0.3 -0.3 -65
Max
4.0 VDD+ 150 24 500
Units
V V C dBm V
C16 GND RF1 GND Data GND CLK
1 2 3 4 5 6 7
21
C8
20 GND 19 RF2
TST PIN VESD
PE94302
18 GND 17 P/S
16 GND 15 POR
Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the DC Electrical Specifications table. Exposure to absolute maximum ratings for extended periods may affect device reliability. Table 4. DC Electrical Specifications
Parameter
VDD Power Supply Voltage IDD Power Supply Current TOP Operating Digital Input High Digital Input Low Digital Input Leakage
GND 10
PUP1 11
GND 12
PUP2 13
VDD
Table 2. Pin Descriptions
Pin No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Paddle
Pin Name
C16 GND RF1 GND Data GND CLK LE VDD GND PUP1 GND PUP2 VSS POR GND P/S GND RF2 GND C8 C4 C2 GND GND GND C1 C0.5 GND
Description
Attenuation control bit, 16dB Ground connection RF port (Note 1). Ground connection Serial interface data input Ground connection Serial interface clock input. Latch Enable input (Note 2). Power supply pin. Ground connection Power-up selection bit, MSB. Ground connection Power-up selection bit, LSB. Negative supply voltage Power reset Ground connection Parallel/Serial mode select. Ground connection RF port (Note 1). Ground connection Attenuation control bit, 8 dB. Attenuation control bit, 4 dB. Attenuation control bit, 2 dB. Ground connection Ground connection Ground connection Attenuation control bit, 1 dB. Attenuation control bit, 0.5 dB. Ground connection
VSS
LE
14
8
9
Min
2.7
Typ
3.0
Max
3.3 100
Units
V A C V
-40 0.7xVDD
85
0.3xVDD 1
V A
Exposed Solder Pad Connection The exposed solder pad on the bottom of the package must be grounded for proper device operation. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rate specified in Table 3. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. Switching Frequency The PE94302 has a maximum 25 kHz switching rate.
Document No. 70/0186-01 UltraCMOSTM RFIC Solutions
Note 1: Both RF ports must be held at 0 VDC or DC blocked with an external series capacitor. 2: Latch Enable (LE) has an internal 100 k resistor to VDD.
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 5
PE94302
Advance Information
Typical Performance Data (25C, VDD=3.0 V) Figure 4. Insertion Loss Vs. Frequency Figure 5. Attenuation Error Vs. Attenuation Setting 250 M Hz
500 M Hz 1 000 M Hz 1 500 M Hz 2000 M Hz
Mean insertion loss
0
1 0 -1 Error (dB)
0 500 1000 RF Frequency (MHz) 1500 2000
-1 Insertion Loss (dB)
-2
-2 -3
-3
-4
-4 -5 0 8 16 24 32 Attenuation Setting (dB)
-5
Document No. 70/0186-01 www.psemi.com
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 5
PE94302
Advance Information
Figure 6. Package Drawing
28-lead CQFP
NOTES: 1. METALLIZATION/ PLATING: REFRACTORY METAL = Ni (75~350u") = Au (50u"MIN) 2. METALLIZED CASTELLATIONS. 3. DIELECTIC RUN INTO CASTELLATIONS SHALL BE ACCEPTABLE. 4. GOLD SPECKLES ON DIELECTRIC COAT SHALL BE ACCEPTABLE. 5. VISUAL ANOMALIES IN CASTELLATION METALLIZATION ACCEPTABLE. 6. TEXT AND ITS LOCATIONS ON LEAD FRAME ARE VENDOR'S OPTION. 7. SLIGHT PATTERN MISMATCH WITH DRAWING DUE TO DIELECTRIC COAT MISALIGNMENT SHALL BE ACCEPTABLE. 8. SEAL RING & HEAT SINK ARE CONNECTED TO GND. 9. LEAD INTEGRITY (ADHESION/ ALIGNMENT/ COPRANARITY), CASTELLATION QUALITY ARE BEST EFFORT BASIS.
Table 10. Ordering Information
Order Code
94302-01 94302-11 94302-00
Part Marking
94302 94302 PE94302-EK
Description
PE94302-28CQFP-50B Engineering Samples PE94302-28CQFP-50B Production Units PE94302 Evaluation Kit
Package
28-lead CQFP 28-lead CQFP Evaluation Board
Shipping Method
50 Count Trays 50 Count Trays 1 / Box
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 5
Document No. 70/0186-01 UltraCMOSTM RFIC Solutions
PE94302
Advance Information
Sales Offices
The Americas Peregrine Semiconductor Corp.
9450 Carroll Park Drive San Diego, CA 92121 Tel 858-731-9400 Fax 858-731-9499
North Asia Pacific Peregrine Semiconductor K.K.
5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213
Europe Peregrine Semiconductor Europe
Commercial Products: Batiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: +33-1-47-41-91-73 Fax : +33-1-47-41-91-73 Space and Defense Products: 180 Rue Jean de Guiramand 13852 Aix-En-Provence cedex 3, France Tel: +33(0) 4 4239 3361 Fax: +33(0) 4 4239 7227
South Asia Pacific Peregrine Semiconductor
28G, Times Square, No. 500 Zhangyang Road, Shanghai, 200122, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS is a trademark of Peregrine Semiconductor Corp.
Preliminary Specification
The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice).
Document No. 70/0186-01 www.psemi.com
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 5


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